SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Controls the dm2ws WKUP_TIMEOUT0 gasket
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| Instance Name | Physical Address |
|---|---|
| MCU_CTRL_MMR0 | 0450 4604h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| WKUP_MTOG_CTRL0_IDLE_STAT | RESERVED | ||||||
| R | NONE | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| WKUP_MTOG_CTRL0_FORCE_TIMEOUT | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| WKUP_MTOG_CTRL0_TIMEOUT_EN | RESERVED | ||||||
| R/W | NONE | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | WKUP_MTOG_CTRL0_TIMEOUT_VAL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | WKUP_MTOG_CTRL0_IDLE_STAT | R | 0h | Idle status When high, indicates MTOGundefined is idle. Field values (others are reserved): 1'b0 - BUSY 1'b1 - IDLE Reset Source: mod_g_rst_n |
| 30:24 | RESERVED | NONE | 0h | Reserved |
| 23:16 | WKUP_MTOG_CTRL0_FORCE_TIMEOUT | R/W | 0h | Force Timout This is a fault tolerant bitfield. Forces a flush of the interface transactions. This bitfield is only relevant if timeout_en=1. After forcing a timeout by Writing the encoded value, the force_timeout and timeout_en bitfields mut be cleared to clear the timeout before re-enabling the gasket. Field values (others are reserved): 8'h00 - CLEAR_TIMEOUT 8'h95 - FORCE_TIMEOUT Reset Source: mod_g_rst_n |
| 15 | WKUP_MTOG_CTRL0_TIMEOUT_EN | R/W | 0h | Timeout Gasket Enable Field values (others are reserved): 1'b0 - DISABLED (write 0 to clear the interrupt and reset the gasket counter) 1'b1 - ENABLED Reset Source: mod_g_rst_n |
| 14:3 | RESERVED | NONE | 0h | Reserved |
| 2:0 | WKUP_MTOG_CTRL0_TIMEOUT_VAL | R/W | 0h | Gasket Timeout Value Selects the number of clock cycles before the interface is considered to have timed out Field values (others are reserved): 3'b000 - TO_1K_CYCLES 3'b001 - TO_4K_CYCLES 3'b010 - TO_16K_CYCLES 3'b011 - TO_64K_CYCLES 3'b100 - TO_256K_CYCLES 3'b101 - TO_1024K_CYCLES 3'b110 - TO_2048K_CYCLES 3'b111 - TO_4096K_CYCLES Reset Source: mod_g_rst_n |