SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The FW Region 3 Start Address Low Register defines the start address bits 31 to 0 for the target Ipulsar_ul_wkup_0.cpu0_slv region 3 firewall.
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| Instance Name | Physical Address |
|---|---|
| WKUP_CBASS0 | 4500 8070h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| START_ADDRESS_L | |||||||
| R/W | |||||||
| 74800h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| START_ADDRESS_L | |||||||
| R/W | |||||||
| 74800h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| START_ADDRESS_L | START_ADDRESS_LSB | ||||||
| R/W | R | ||||||
| 74800h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| START_ADDRESS_LSB | |||||||
| R | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:12 | START_ADDRESS_L | R/W | 74800h | Start address bits 31 to 12. Lowest 12 bits are forced to 0 as address must be 4KB aligned. Reset Source: domain_default_rst_mod_g_rst_n |
| 11:0 | START_ADDRESS_LSB | R | 0h | Start address bits 11 to 0 are forced to 0 as address must be 4KB aligned. Reset Source: domain_default_rst_mod_g_rst_n |