SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Device Type Identifier Register
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0 | 0007 6000 4FCCh |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SUB | MAJOR | ||||||
| R | R | ||||||
| 1h | 1h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:8 | RESERVED | R | 0h | Reserveed, returns 0 |
| 7:4 | SUB | R | 1h | Sub-classification of the type of the debug component as specified in the Arm Architecture Specification within the major classification as specified in the MAJOR field |
| 3:0 | MAJOR | R | 1h | Major classification of the type of the debug component as specified in the Arm Architecture Specification for this debug and trace component |