SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Component ID1 Register
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0 | 0007 6000 4FF4h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CLASS | PRMBL_1 | ||||||
| R | R | ||||||
| 9h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:8 | RESERVED | R | 0h | Read returns 0 |
| 7:4 | CLASS | R | 9h | Return 0x9. Class of the component. Contain bits [15:12] of the component ID. |
| 3:0 | PRMBL_1 | R | 0h | Component ID register contains bits16:8 of the component ID |