Inicio Convertidores de datos Convertidores analógico-digitales (ADC) ADC de alta velocidad (≥ 10 MSPS)
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Convertidores de datos
Convertidores analógico-digitales (ADC)
ADC de alta velocidad (≥ 10 MSPS)

ADS58C48

ACTIVO

Convertidor analógico a digital (ADC) de cuatro canales, 11 bits y 200 MSPS

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ADS58C48

ACTIVO
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Detalles del producto

Sample rate (max) (Msps) 200 Resolution (Bits) 11 Number of input channels 4 Interface type Parallel CMOS, Parallel LVDS Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 900 Architecture Pipeline SNR (dB) 66.7 ENOB (Bits) 10.7 SFDR (dB) 84 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 200 Resolution (Bits) 11 Number of input channels 4 Interface type Parallel CMOS, Parallel LVDS Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 900 Architecture Pipeline SNR (dB) 66.7 ENOB (Bits) 10.7 SFDR (dB) 84 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PFP) 80 196 mm² (14 mm × 14 mm)
  • Maximum Sample Rate: 200 MSPS
  • High Dynamic Performance
    • SFDR 82 dBc at 140 MHz
    • 72.3 dBFS SNR in 60 MHz BW Using SNRBoost3G technology
  • SNRBoost3G Highlights
    • Supports Wide Bandwidth up to 60 MHz
    • Programmable Bandwidths – 60 MHz, 40 MHz, 30 MHz, 20 MHz
    • Flat Noise Floor within the Band
    • Independent SNRBoost3G Coefficients for Every Channel
  • Output Interface
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350mV
      • Low Swing: 200mV
      • Default Strength: 100 Termination
      • 2x Strength: 50 Termination
    • 1.8V Parallel CMOS Interface Also Supported
  • Ultra-Low Power with Single 1.8V Supply
    • 0.9W Total Power
    • 1.32 W Total Power (200 MSPS) with SNRBoost3G on all 4 Channels
    • 1.12 W Total Power (200 MSPS) with SNRBoost3G on 2 Channels
  • Programmable Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude
  • 80-TQFP Package
  • Maximum Sample Rate: 200 MSPS
  • High Dynamic Performance
    • SFDR 82 dBc at 140 MHz
    • 72.3 dBFS SNR in 60 MHz BW Using SNRBoost3G technology
  • SNRBoost3G Highlights
    • Supports Wide Bandwidth up to 60 MHz
    • Programmable Bandwidths – 60 MHz, 40 MHz, 30 MHz, 20 MHz
    • Flat Noise Floor within the Band
    • Independent SNRBoost3G Coefficients for Every Channel
  • Output Interface
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350mV
      • Low Swing: 200mV
      • Default Strength: 100 Termination
      • 2x Strength: 50 Termination
    • 1.8V Parallel CMOS Interface Also Supported
  • Ultra-Low Power with Single 1.8V Supply
    • 0.9W Total Power
    • 1.32 W Total Power (200 MSPS) with SNRBoost3G on all 4 Channels
    • 1.12 W Total Power (200 MSPS) with SNRBoost3G on 2 Channels
  • Programmable Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude
  • 80-TQFP Package

The ADS58C48 is a quad channel 11-bit A/D converter with sampling rate up to 200 MSPS. It uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. This makes it well-suited for multi-carrier, wide band-width communications applications.

The ADS58C48 uses third-generation SNRBoost3G technology to overcome SNR limitation due to quantization noise (for bandwidths < Nyquist, Fs/2). Enhancements in the SNRBoost3G technology allow support for SNR improvements over wide bandwidths (up to 60 MHz). In addition, separate SNRBoost3G coefficients can be programmed for each channel.

The device has digital gain function that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset.

The digital outputs of all channels are output as DDR LVDS (Double Data Rate) together with an LVDS clock output. The low data rate of this interface (400Mbps at 200 MSPS sample rate) makes it possible to use low-cost FPGA-based receivers. The strength of the LVDS output buffers can be increased to support 50 ohms differential termination. This allows the output clock signal to be connected to two separate receiver chips with an effective 50 termination (such as the two clock ports of the GC5330).

The same digital output pins can also be configured as a parallel 1.8V CMOS interface.

It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The device is specified over the industrial temperature range (–40°C to 85°C).

The ADS58C48 is a quad channel 11-bit A/D converter with sampling rate up to 200 MSPS. It uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. This makes it well-suited for multi-carrier, wide band-width communications applications.

The ADS58C48 uses third-generation SNRBoost3G technology to overcome SNR limitation due to quantization noise (for bandwidths < Nyquist, Fs/2). Enhancements in the SNRBoost3G technology allow support for SNR improvements over wide bandwidths (up to 60 MHz). In addition, separate SNRBoost3G coefficients can be programmed for each channel.

The device has digital gain function that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset.

The digital outputs of all channels are output as DDR LVDS (Double Data Rate) together with an LVDS clock output. The low data rate of this interface (400Mbps at 200 MSPS sample rate) makes it possible to use low-cost FPGA-based receivers. The strength of the LVDS output buffers can be increased to support 50 ohms differential termination. This allows the output clock signal to be connected to two separate receiver chips with an effective 50 termination (such as the two clock ports of the GC5330).

The same digital output pins can also be configured as a parallel 1.8V CMOS interface.

It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The device is specified over the industrial temperature range (–40°C to 85°C).
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Documentación técnica

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Ver todo 11
Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos Quad Channel IF Receiver with SNRBoost 3G datasheet 27/05/2010
Nota sobre la aplicación Band-Pass Filter Design Techniques for High-Speed ADCs 27/02/2012
Nota sobre la aplicación High-Speed, Analog-to-Digital Converter Basics 11/01/2012
Nota sobre la aplicación Power Supply Design for the ADS41xx (Rev. A) 29/12/2011
Nota sobre la aplicación Understanding Low-Amplitude Behavior of 11-bit ADCs 22/10/2011
Nota sobre la aplicación Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10/09/2010
Nota sobre la aplicación Using Windowing With SNRBoost 3G Technology 30/08/2010
Nota sobre la aplicación Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28/04/2009
Nota sobre la aplicación CDCE62005 as Clock Solution for High-Speed ADCs 4/09/2008
Nota sobre la aplicación CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 8/06/2008
Nota sobre la aplicación Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2/06/2008

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

ADS58C28EVM — Módulo de evaluación del convertidor analógico a digital ADS58C28 de dos canales, 11 bits y 200 MSPS

El ADS58C28EVM es una placa de circuito que permite a los diseñadores evaluar el rendimiento del dispositivo ADS58C28 de Texas Instruments, un convertidor analógico a digital de doble canal de 11 bits y 200 MSPS que incorpora la tecnología SNRBoost de TI. El ADC EVM cuenta con una salida de datos (...)

Guía del usuario: PDF
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En inventario
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GUI para el módulo de evaluación (EVM)

ADS58C48SPI-SW — ADS58C48 SPI Software

The ADS58C28 EVM software GUI allows for programming control of the ADS58C48.
Productos y hardware compatibles
GUI para el módulo de evaluación (EVM)

DATACONVERTERPRO-SW — Instalador de interfaz gráfica de usuario (GUI) profesional de convertidor de datos de alta velocidad, v5.31

Esta interfaz gráfica de usuario (GUI) de convertidor de datos de alta velocidad pro es un programa para PC (compatible con Windows® XP/7/10) que está diseñado para ayudar en la evaluación de la mayoría de los convertidores de datos de alta velocidad (convertidor de señal analógica a digital [ADC] (...)

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Soporte de software

SBAC120 — TIGAR Support Files

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Herramienta de cálculo

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

La calculadora del ingeniero analógico está diseñada para acelerar muchos de los cálculos repetitivos que los ingenieros de diseño de circuitos analógicos utilizan de forma habitual. Esta herramienta para PC proporciona una interfaz gráfica con una lista de varios cálculos comunes que van desde el (...)

Productos y hardware compatibles
Herramienta de cálculo

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

Productos y hardware compatibles
Herramienta de diseño

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
HTQFP (PFP) 80 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

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