ADS58C48SPI-SW — ADS58C48 SPI Software
Productos y hardware compatibles
Productos
ADC de alta velocidad (≥ 10 MSPS)
- ADS58C48 — Convertidor analógico a digital (ADC) de cuatro canales, 11 bits y 200 MSPS
Termination
TerminationThe ADS58C48 is a quad channel 11-bit A/D converter with sampling rate up to 200 MSPS. It uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. This makes it well-suited for multi-carrier, wide band-width communications applications.
The ADS58C48 uses third-generation SNRBoost3G technology to overcome SNR limitation due to quantization noise (for bandwidths < Nyquist, Fs/2). Enhancements in the SNRBoost3G technology allow support for SNR improvements over wide bandwidths (up to 60 MHz). In addition, separate SNRBoost3G coefficients can be programmed for each channel.
The device has digital gain function that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset.
The digital outputs of all channels are output as DDR LVDS (Double Data Rate) together with an LVDS clock output. The low data rate of this interface (400Mbps at 200 MSPS sample rate) makes it possible to use low-cost FPGA-based receivers. The strength of the LVDS output buffers can be increased to support 50 ohms differential termination. This allows the output clock signal to be connected to two separate receiver chips with an effective 50
termination (such as the two clock ports of the GC5330).
The same digital output pins can also be configured as a parallel 1.8V CMOS interface.
It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The device is specified over the industrial temperature range (–40°C to 85°C).
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | Quad Channel IF Receiver with SNRBoost 3G datasheet | 27 may 2010 | |
| Application note | Band-Pass Filter Design Techniques for High-Speed ADCs | 27 feb 2012 | ||
| Application note | High-Speed, Analog-to-Digital Converter Basics | 11 ene 2012 | ||
| Application note | Power Supply Design for the ADS41xx (Rev. A) | 29 dic 2011 | ||
| Application note | Understanding Low-Amplitude Behavior of 11-bit ADCs | 22 oct 2011 | ||
| Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 10 sep 2010 | ||
| Application note | Using Windowing With SNRBoost 3G Technology | 30 ago 2010 | ||
| Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 28 abr 2009 | ||
| Application note | CDCE62005 as Clock Solution for High-Speed ADCs | 04 sep 2008 | ||
| Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 08 jun 2008 | ||
| Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 02 jun 2008 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
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| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| HTQFP (PFP) | 80 | Ultra Librarian |
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Desktop software installer
General calculator tool for analog design support.
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