ADS61JB23

ACTIVO

Convertidor analógico a digital (ADC) de 12 bits y 80 MSPS

Detalles del producto

Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 1 Interface type JESD204A Analog input BW (MHz) 480 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 440 Architecture Pipeline SNR (dB) 71.7 ENOB (Bits) 11.5 SFDR (dB) 80 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 1 Interface type JESD204A Analog input BW (MHz) 480 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 440 Architecture Pipeline SNR (dB) 71.7 ENOB (Bits) 11.5 SFDR (dB) 80 Operating temperature range (°C) -40 to 85 Input buffer Yes
VQFN (RHA) 40 36 mm² 6 x 6
  • Output Interface:
    • Single-Lane and Dual-Lane Interfaces
    • Maximum Data Rate of 1.6 Gbps
    • Meets JESD204A Specification
    • CML Outputs with Current Programmable from 2 mA – 32 mA
  • Power Dissipation:
    • 440 mW at 80 MSPS in Single Lane Mode
    • Power Scales Down with Clock Rate
  • Input Interface: Buffered Analog Inputs
  • 71.7 dBFS SNR at 70 MHz IF
  • Analog Input FSR: 2 Vpp
  • External and Internal (trimmed) Reference Support
  • 1.8V Supply (Analog and digital), 3.3 V Supply for Input Buffer
  • Programmable Digital Gain: 0dB – 6dB
  • Straight Offset Binary or Twos Complement Output
  • Package:
    • 6 mm × 6 mm QFN-40
  • Output Interface:
    • Single-Lane and Dual-Lane Interfaces
    • Maximum Data Rate of 1.6 Gbps
    • Meets JESD204A Specification
    • CML Outputs with Current Programmable from 2 mA – 32 mA
  • Power Dissipation:
    • 440 mW at 80 MSPS in Single Lane Mode
    • Power Scales Down with Clock Rate
  • Input Interface: Buffered Analog Inputs
  • 71.7 dBFS SNR at 70 MHz IF
  • Analog Input FSR: 2 Vpp
  • External and Internal (trimmed) Reference Support
  • 1.8V Supply (Analog and digital), 3.3 V Supply for Input Buffer
  • Programmable Digital Gain: 0dB – 6dB
  • Straight Offset Binary or Twos Complement Output
  • Package:
    • 6 mm × 6 mm QFN-40

The ADS61JB23 is a high-performance, low-power, single channel analog-to-digital converter with an integrated JESD204A output interface. Available in a 6 mm × 6 mm QFN package, with both single-lane and dual-lane output modes, the ADS61JB23 offers an unprecedented level of compactness. The output interface is compatible to the JESD204A standard, with an additional mode (as per IEEE Std 802.3-2002 part3, Clause 36.2.4.12) to interface seamlessly to the TI TLK family of SERDES transceivers. Equally impressive is the inclusion of an on-chip analog input buffer, providing isolation between the sample/hold switches and higher and more consistent input impedance.

The ADS61JB23 is specified over the industrial temperature range (–40°C to 85°C).

The ADS61JB23 is a high-performance, low-power, single channel analog-to-digital converter with an integrated JESD204A output interface. Available in a 6 mm × 6 mm QFN package, with both single-lane and dual-lane output modes, the ADS61JB23 offers an unprecedented level of compactness. The output interface is compatible to the JESD204A standard, with an additional mode (as per IEEE Std 802.3-2002 part3, Clause 36.2.4.12) to interface seamlessly to the TI TLK family of SERDES transceivers. Equally impressive is the inclusion of an on-chip analog input buffer, providing isolation between the sample/hold switches and higher and more consistent input impedance.

The ADS61JB23 is specified over the industrial temperature range (–40°C to 85°C).

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet 12-Bit Input-Buffered 80 MSPS ADC with JESD204A Output Interface datasheet 01 dic 2012
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 may 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 jul 2013

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Firmware

TI204C-IP Request for JESD204 rapid design IP

The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)

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This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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GUI para el módulo de evaluación (EVM)

SLAC530 ADS61JB23 SPI GUI Installer

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Soporte de software

SBAC120 TIGAR Support Files

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Modelo de simulación

ADS61JBXX IBIS Model

SLOM341.ZIP (110 KB) - IBIS Model
Herramienta de cálculo

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Herramienta de diseño

SBAC119 TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

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