When first considering switches, a schematic of the ideal switch (similar to Figure 1-1) might come to mind.

Figure 1-1 Ideal Switch

An input signal applied to the left I/O pin (or port) in Figure 1-1 results in an identical output signal at the right I/O pin, and vice versa. However, in the real world, switches are not ideal and there always is some loss. In the case of clean, properly working mechanical switches, the loss is so minuscule that it hardly bears noting.

Like mechanical switches, solid-state switches are not ideal either. In fact, losses associated with solid-state switches can be significant. Why use a switch like this if it is so far from ideal? The answer is convenience. Solid-state switches are small, fast, easy to use, easy to control, and consume relatively little power compared to traditional electrically controlled switches, such as relays. The switches referred to in this application report are complementary metal-oxide semiconductor (CMOS) field-effect transistor (FET) switches. As mentioned previously, they are not ideal, so we need a way to examine and compare the performance characteristics of the different CMOS families. Figure 1-2 shows a simplified-circuit model of a CMOS switch.

Figure 1-2 Behavioral Model of CMOS (FET) Switch

The output signal (right side, Figure 1-2) is altered due to parasitic effects of the switch. Results may include decreased amplitude, signal distortion, phase shift, the introduction of noise, and frequency attenuation.

Parameters contributing to the nonideal characteristics include:

• C_i - Control (enable) pin input capacitance
• C_io - Capacitance measured from either the input or output of the switch
• C_CHNL - NMOS (PMOS) channel capacitance
• R_ON - The resistance inserted into the signal path as a result of the switch path being turned on
• C_F - Feed-through capacitance; negligible at lower frequencies or when switch is closed.