OPA2863A
- Gain-bandwidth product: 50MHz
- High precision:
- Input offset voltage: 95µV (maximum)
- Offset drift: 1.2µV/°C (maximum)
- Low power:
- Quiescent current: 800µA/ch (typical)
- Supply voltage: 2.7V to 12.6V
- Input voltage noise: 6.3nV/√Hz
- Slew rate: 100V/µs
- Rail-to-rail input and output
- HD2 and HD3:
- –129dBc and –138dBc at 20kHz (2VPP)
- Operating temperature range: –40°C to +125°C
- Additional features:
- Overload power limit
- Output short-circuit protection
The OPA863A and OPA2863A devices (OPAx863A) are low-power, unity-gain stable, rail-to-rail input and output, voltage-feedback operational amplifiers. These devices are trimmed in package to offer high-precision performance with a maximum input offset voltage of 95µV and offset drift of 1.2µV/°C for high accuracy measurements over temperature.
Consuming only 800µA per channel, the OPAx863A offer a gain-bandwidth product of 50MHz, slew rate of 100V/µs, and a voltage noise density of 6.3nV/√Hz. The rail-to-rail input stage with 2.7V supply operation is useful in portable, battery-powered applications. The rail-to-rail input stage is well matched for gain-bandwidth product and noise across the full input common-mode voltage range, enabling excellent performance with wide-input dynamic range.
The OPAx863A include overload power limiting to limit the increase in IQ with saturated outputs, thereby preventing excessive power dissipation in power-conscious, battery-operated systems. The output stage is short-circuit protected, making these devices conducive to ruggedized environments.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | OPAx863A High-Precision, 105MHz, Rail-to-Rail Input/Output Amplifiers datasheet (Rev. G) | PDF | HTML | 2024/12/24 | ||
| Circuit design | Circuit for driving high-voltage SAR ADC with a buffered instrumentation (Rev. A) | PDF | HTML | 2024/9/20 | |||
| Circuit design | Inverting circuit for high-to-low voltage level translation to drive ADC (Rev. A) | PDF | HTML | 2024/9/19 | |||
| Circuit design | Driving a low-voltage single-ended SAR ADC circuit with high-voltage input (Rev. A) | PDF | HTML | 2024/9/19 | |||
| Application brief | How to Design MFB Filters with Amplifier Bandwidth Limitations | PDF | HTML | 2024/1/4 | |||
| 證書 | DEM-OPA-DSN-EVM EU RoHS Declaration of Conformity (DoC) | 2021/12/6 | ||||
| Application brief | Higher accuracy using an external amplifier in ultrasonic flow measurement | 2019/2/5 | ||||
| 設計指南 | High-Speed, High-Side Current Sense Reference Design | 2017/7/19 | ||||
| 應用說明 | ADC Input Protection | 2013/9/4 | ||||
| 應用說明 | A Walk Along the Signal Path (High-Speed Signal Path) | 2005/3/30 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
DEM-OPA-DSN-EVM — 適用於採用 DSN 封裝之雙路運算放大器的評估模組
DEM-OPA-DSN-EVM 評估模組 (EVM) 是一種展示固定裝置，可協助設計人員評估 Texas Instruments Incorporated 高速、寬頻運算放大器的運作和性能。此未組裝 PC 基板相容於以 10 針腳 SON (DSN) 封裝提供的雙通道放大器產品。EVM 的設計旨在配合多種放大器配置，提供最大彈性及易用性。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGK) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |
| USON (DSN) | 10 | Ultra Librarian |