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數據轉換器
類比轉數位轉換器 (ADC)
高速 ADC (≥10 MSPS)

ADS5413

現行

12 位元、65-MSPS、1.0-GHz 輸入頻寬類比轉數位轉換器 (ADC)

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產品規格表

ADS5413

現行
產品規格表 立即訂購

產品詳細資料

Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1000 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 400 Architecture Pipeline SNR (dB) 68.5 ENOB (Bits) 11.3 SFDR (dB) 81 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1000 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 400 Architecture Pipeline SNR (dB) 68.5 ENOB (Bits) 11.3 SFDR (dB) 81 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PHP) 48 81 mm² 9 x 9
  • 12-Bit Resolution
  • 65-MSPS Maximum Sample Rate
  • 2-Vpp Differential Input Range
  • 3.3-V Single Supply Operation
  • 1.8-V to 3.3-V Output Supply
  • 400-mW Total Power Dissipation
  • Two’s Complement Output Format
  • On-Chip S/H and Duty Cycle Adjust Circuit
  • Internal or External Reference
  • 48-Pin TQFP Package With PowerPad
    (7 mm x 7 mm body size)
  • 64.5-dBFS SNR and 72-dBc SFDR at 65 MSPS and 190-MHz Input
  • Power-Down Mode
  • Single-Ended or Differential Clock
  • 1-GHz -3-dB Input Bandwidth
  • APPLICATIONS
    • High IF Sampling Receivers
    • Medical Imaging
    • Portable Instrumentation

CommsADC is a trademark of Texas Instruments.
  • 12-Bit Resolution
  • 65-MSPS Maximum Sample Rate
  • 2-Vpp Differential Input Range
  • 3.3-V Single Supply Operation
  • 1.8-V to 3.3-V Output Supply
  • 400-mW Total Power Dissipation
  • Two’s Complement Output Format
  • On-Chip S/H and Duty Cycle Adjust Circuit
  • Internal or External Reference
  • 48-Pin TQFP Package With PowerPad
    (7 mm x 7 mm body size)
  • 64.5-dBFS SNR and 72-dBc SFDR at 65 MSPS and 190-MHz Input
  • Power-Down Mode
  • Single-Ended or Differential Clock
  • 1-GHz -3-dB Input Bandwidth
  • APPLICATIONS
    • High IF Sampling Receivers
    • Medical Imaging
    • Portable Instrumentation

CommsADC is a trademark of Texas Instruments.

The ADS5413 is a low power, 12-bit, 65-MSPS, CMOS pipeline analog-to-digital converter (ADC) that operates from a single 3.3-V supply, while offering the choice of digital output levels from 1.8 V to 3.3 V. The low noise, high linearity, and low clock jitter makes the ADC well suited for high-input frequency sampling applications. On-chip duty cycle adjust circuit allows the use of a non-50% duty cycle. This can be bypassed for applications requiring low jitter or asynchronous sampling. The device can also be clocked with single ended or differential clock, without change in performance. The internal reference can be bypassed to use an external reference to suit the accuracy and low drift requirements of the application.

The device is specified over full temperature range (–40°C to +85°C).

The ADS5413 is a low power, 12-bit, 65-MSPS, CMOS pipeline analog-to-digital converter (ADC) that operates from a single 3.3-V supply, while offering the choice of digital output levels from 1.8 V to 3.3 V. The low noise, high linearity, and low clock jitter makes the ADC well suited for high-input frequency sampling applications. On-chip duty cycle adjust circuit allows the use of a non-50% duty cycle. This can be bypassed for applications requiring low jitter or asynchronous sampling. The device can also be clocked with single ended or differential clock, without change in performance. The internal reference can be bypassed to use an external reference to suit the accuracy and low drift requirements of the application.

The device is specified over full temperature range (–40°C to +85°C).
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重要文件 類型 標題 格式選項 日期
* Data sheet ADS5413: 12-bit, 65 MSPS CommsADC Analog-to-Digital Converter datasheet 2003年 12月 16日
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日
Application note High-Speed, Analog-to-Digital Converter Basics 2012年 1月 11日
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010年 9月 10日
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009年 4月 28日
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008年 6月 8日
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008年 6月 2日
Application note Standard Procedure Direct Measurement Sub-picosecond RMS Jitter High-Speed ADC 2004年 6月 30日
Application note How to Calculate the Period Jitter from the SSCR for High-Speed ADCs 2003年 12月 17日

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計算工具

ADC-HARMONIC-CALC — ADC Frequency Calculator Download

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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計算工具

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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設計工具

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
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