12-Bit, 53-MSPS Analog-to-Digital Converter (ADC)
Product details
Parameters
Package | Pins | Size
Features
- SPURIOUS-FREE DYNAMIC RANGE:
82dB at 10MHz fIN - HIGH SNR: 67.5dB (2Vp-p), 69dB (3Vp-p)
- LOW POWER: 335mW
- INTERNAL OR EXTERNAL REFERENCE
- LOW DNL: 0.5LSB
- FLEXIBLE INPUT RANGE: 2Vp-p to 3Vp-p
- SSOP-28 PACKAGE
- APPLICATIONS
- COMMUNICATIONS IF PROCESSING
- COMMUNICATIONS BASESTATIONS
- TEST EQUIPMENT
- MEDICAL IMAGING
- VIDEO DIGITIZING
- CCD DIGITIZING
Description
The ADS807 is a high-speed, high dynamic range, 12-bit pipelined Analog-to-Digital (A/D) converter. This converter includes a high-bandwidth track-and-hold that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of this track-and-hold and A/D converter circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity. The track-and-hold can also be operated single-ended.
The ADS807 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled allowing low drive, internal references to be used for improved tracking in multichannel systems.
The ADS807 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front end gain control circuitry. There is also an output enable pin to allow for multiplexing and testability on a PC board.
The ADS807 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | ADS807: 12-Bit, 53MHz Sampling Analog-To-Digital Converter datasheet (Rev. A) | Jun. 11, 2002 |
Technical article | Keys to quick success using high-speed data converters | Oct. 13, 2020 | |
Technical article | How to achieve fast frequency hopping | Mar. 03, 2019 | |
Technical article | RF sampling: Learning more about latency | Feb. 09, 2017 | |
Technical article | Why phase noise matters in RF sampling converters | Nov. 28, 2016 | |
Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | Sep. 10, 2010 | |
Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | Apr. 28, 2009 | |
Application note | CDCE62005 as Clock Solution for High-Speed ADCs | Sep. 04, 2008 | |
Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | Jun. 08, 2008 | |
Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | Jun. 02, 2008 | |
User guide | DEM-ADS807E: Demonstration Fixture | Sep. 27, 2000 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SSOP (DB) | 28 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.