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ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and transformer-coupled (...)
The ADS855xEVM is designed for the prototyping and evaluation of the ADS8556, ADS8557 or ADS8558 analog-to-digital converters (ADC). These 16/14/12-bit, capacitor-based, SAR/ADCs operate at a sampling rates up to 730kSPS. The EVM allows the use of optional dual channel buffer amplifiers U1, U5 and (...)
- Full-featured evaluation board for the ADS8556, ADS8557 or ADS8558 parallel/serial Analog to Digital Converter.
- Onboard or off board references using on board jumpers
- Compatible with the 5-6k Interface board, DSK Starter Kits and HPA-MCU Interface
Design tools & simulation
SBAM011B.ZIP (80 KB) - IBIS Model
SPICE-based analog simulation program
— TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Analog engineer's calculator
— The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
- Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
- Noise calculations
- Common unit translation
- Solves common amplifier circuit design problems
- Gain selections using standard resistors
- Filter configurations
- Total noise for common amplifier configurations
Jitter and SNR Calculator for ADCs
— JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.