Product details

Resolution (Bits) 18 Number of input channels 1 Sample rate (Max) (kSPS) 250 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 14 Analog voltage AVDD (Min) (V) 3 SNR (dB) 102.5 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 1.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
Resolution (Bits) 18 Number of input channels 1 Sample rate (Max) (kSPS) 250 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 14 Analog voltage AVDD (Min) (V) 3 SNR (dB) 102.5 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 1.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
VQFN (RGE) 24 16 mm² 4 x 4
  • Resolution: 18-Bits
  • High Sample Rate With No Latency Output:
    • ADS8910B: 1-MSPS
    • ADS8912B: 500-kSPS
    • ADS8914B: 250-kSPS
  • Integrated LDO Enables Single-Supply Operation
  • Low-Power Reference Buffer With No Droop
  • Excellent AC and DC Performance:
    • SNR: 102.5-dB, THD: –125-dB
    • INL: ±0.5-LSB
    • DNL: ±0.2-LSB, 18-Bit No-Missing-Codes
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Single-Supply, Low-Power Operation
    (Includes Internal Reference Buffer and LDO)
    • ADS8910B : 21-mW at 1-MSPS
    • ADS8912B : 16-mW at 500-kSPS
    • ADS8914B : 14-mW at 250-kSPS
  • Enhanced-SPI Digital Interface
    • Interface SCLK: 20-MHz at 1-MSPS
    • Configurable Data Parity Output
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Resolution: 18-Bits
  • High Sample Rate With No Latency Output:
    • ADS8910B: 1-MSPS
    • ADS8912B: 500-kSPS
    • ADS8914B: 250-kSPS
  • Integrated LDO Enables Single-Supply Operation
  • Low-Power Reference Buffer With No Droop
  • Excellent AC and DC Performance:
    • SNR: 102.5-dB, THD: –125-dB
    • INL: ±0.5-LSB
    • DNL: ±0.2-LSB, 18-Bit No-Missing-Codes
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Single-Supply, Low-Power Operation
    (Includes Internal Reference Buffer and LDO)
    • ADS8910B : 21-mW at 1-MSPS
    • ADS8912B : 16-mW at 500-kSPS
    • ADS8914B : 14-mW at 250-kSPS
  • Enhanced-SPI Digital Interface
    • Interface SCLK: 20-MHz at 1-MSPS
    • Configurable Data Parity Output
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS8910B, ADS8912B, and ADS8914B (ADS891xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 18-bit successive approximation register (SAR) analog-to-digital convertors (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) and ADS892xB (16-bit) resolution variants.

The ADS891xB boost analog performance while maintaining high-resolution data transfer by using TI’s enhanced-SPI feature. Enhanced-SPI enables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, thereby making this device an excellent choice for applications involving FPGAs, DSPs. The ADS89xxB is compatible with a standard SPI Interface.

The ADS891xB has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The ADS8910B, ADS8912B, and ADS8914B (ADS891xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 18-bit successive approximation register (SAR) analog-to-digital convertors (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) and ADS892xB (16-bit) resolution variants.

The ADS891xB boost analog performance while maintaining high-resolution data transfer by using TI’s enhanced-SPI feature. Enhanced-SPI enables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, thereby making this device an excellent choice for applications involving FPGAs, DSPs. The ADS89xxB is compatible with a standard SPI Interface.

The ADS891xB has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Design & development

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Evaluation board

ADS8900BEVM-PDK — ADS8900B Fully-Differential Input, 20-Bit SAR ADC EVM Performance Demonstration Kit (PDK)

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Reference designs

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VQFN (RGE) 24 View options

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