ADS825

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10-Bit, 40-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 40 Resolution (Bits) 10 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 300 Features Low Power Rating Catalog Input range (Vp-p) 1, 2 Power consumption (Typ) (mW) 200 Architecture Pipeline SNR (dB) 60 ENOB (Bits) 9.5 SFDR (dB) 72 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

SSOP (DB) 28 54 mm² 10.5 x 5.3 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • HIGH SNR: 60dB
  • HIGH SFDR: 72dBFS
  • LOW POWER: 190mW
  • INTERNAL/EXTERNAL REFERENCE OPTION
  • SINGLE-ENDED OR FULLY DIFFERENTIAL ANALOG INPUT
  • PROGRAMMABLE INPUT RANGE
  • LOW DNL:0.5LSB
  • SINGLE +5V SUPPLY OPERATION
  • +3V OR +5V LOGIC I/O COMPATIBLE (ADS825)
  • POWER DOWN: 20mW
  • SSOP-28 PACKAGE
  • APPLICATIONS
    • MEDICAL IMAGING
    • TEST EQUIPMENT
    • COMPUTER SCANNERS
    • COMMUNICATIONS
    • VIDEO DIGITIZING

open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS822 and ADS825 are pipeline, CMOS Analog-to-Digital Converters (ADC) that operate from a single +5V power supply. These converters provide excellent performance with a single-ended input and can be operated with a differential input for added spurious performance. These high-performance converters include a 10-bit quantizer, high-bandwidth track-and-hold, and a high-accuracy internal reference. They also allow for the user to disable the internal reference and utilize external references. This external reference option provides excellent gain and offset matching when used in multichannel applications, or in applications where full-scale range adjustment is required.

The ADS822 and ADS825 employ digital error correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for medical imaging, communications, video, and test instrumentation. The ADS822 and ADS825 offer power dissipation of 190mW and also provide a power-down mode, thus reducing power dissipation to only 20mW. The ADS825 is +3V or +5V logic I/O compatible.

The ADS822 and ADS825 are specified at a maximum sampling frequency of 40MSPS and a single-ended input range of 1.5V to 3.5V. The ADS822 and ADS825 are available in an SSOP-28 package and are pin-for-pin compatible with the 10-bit, 60MSPS ADS823 and ADS826, and the 10-bit, 75MSPS ADS828, providing an upgrade path to higher sampling frequencies.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet ADS822, ADS825: 10-Bit, 40MHz Sampling Analog-To-Digital Converter datasheet (Rev. B) Jul. 18, 2002
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Technical articles How to minimize filter loss when you drive an ADC Oct. 20, 2016
Application notes Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application notes Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application notes CDCE62005 as Clock Solution for High-Speed ADCs Sep. 04, 2008
Application notes CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application notes Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
Application notes ADS82x ADC with non-uniform sampling clock Feb. 28, 2005

Design & development

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Design tools & simulation

SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
CALCULATION TOOLS Download
Jitter and SNR Calculator for ADCs
JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

CAD/CAE symbols

Package Pins Download
SSOP (DB) 28 View options

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