The ADS8318 is a 16-bit, 500-KSPS analog-to-digital converter. It operates with a 2.048-V to 5.5-V external reference. The device includes a capacitor based, SAR A/D converter with inherent sample and hold.
The devices includes a 50-MHz SPI compatible serial interface. The interface is designed to support daisy chaining or cascading of multiple devices. Also a Busy Indicator makes it easy to synchronize with the digital host.
The ADS8318 unipolar differential input range supports a differential input swing of –Vref to +Vref with a common-mode of +Vref/2.
Device operation is optimized for very low power operation, and the power consumption directly scales with speed. This feature makes it attractive for lower speed applications.
It is available in 10-pin MSOP and SON packages.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | 16-Bit, 500-KSPS, Serial Interface microPOWER, Miniature SAR ADC* datasheet (Rev. A) | 23 Mar 2011 | |
| Circuit design | Circuit for protecting low-voltage SAR ADC from electrical overstress with minim (Rev. A) | PDF | HTML | 19 Sep 2024 | |
| White paper | Voltage-reference impact on total harmonic distortion | 01 Aug 2016 | ||
| E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 21 May 2015 | ||
| Application note | ADC Parameters Unit Conversion | 05 Mar 2013 | ||
| Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 17 Mar 2011 | ||
| Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 10 Nov 2010 | ||
| Application note | Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319 | 24 Jun 2009 |
For additional terms or required resources, click any title below to view the detail page where available.
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VSON (DRC) | 10 | Ultra Librarian |
| VSSOP (DGS) | 10 | Ultra Librarian |
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Analog Engineer's Calc Installer
General calculator tool for analog design support.
This is the first release of this tool.