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ADS820

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10-Bit, 20-MSPS Analog-to-Digital Converter (ADC)

Data sheet
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10-Bit, 20-MSPS Analog-to-Digital Converter (ADC)

ADS820

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Data sheet Order now

Product details

Parameters

Sample rate (Max) (MSPS) 20 Resolution (Bits) 10 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 65 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 200 Architecture Pipeline SNR (dB) 60.5 ENOB (Bits) 9.5 SFDR (dB) 77 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

SOIC (DW) 28 184 mm² 17.9 x 10.3 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • NO MISSING CODES
  • INTERNAL REFERENCE
  • LOW DIFFERENTIAL LINEARITY ERROR: 0.2LSB
  • LOW POWER: 195mW
  • HIGH SNR: 60dB
  • WIDEBAND TRACK/HOLD: 65MHz
  • APPLICATIONS
    • SET-TOP BOXES
    • CABLE MODEMS
    • VIDEO DIGITIZING
    • CCD IMAGING
      • Camcorders
      • Copiers
      • Scanners
      • Security Cameras
    • IF AND BASEBAND DIGITIZATION

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Description

The ADS820 is a low-power, monolithic 10-bit, 20MHz Analog-to-Digital (A/D) converter utilizing a small geometry CMOS process. This complete converter includes a 10-bit quantizer with internal track-and-hold, reference, and a power down feature. It operates from a single +5V power supply and can be configured to accept either differential or single-ended input signals.

The ADS820 employs digital error correction to provide excellent Nyquist differential linearity performance for demanding imaging applications. Its low distortion, high SNR, and high oversampling capability give it the extra margin needed for telecommunications and video applications.

This high performance converter is specified for ac and DC performance at a 20MHz sampling rate. The ADS820 is available in an SO-28 package.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet 10-Bit, 20MHz Sampling Analog-To-Digital Converter datasheet (Rev. B) Feb. 14, 2005
Technical articles Keys to quick success using high-speed data converters Oct. 13, 2020
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs Sep. 04, 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
Application note ADS82x ADC with non-uniform sampling clock Feb. 28, 2005

Design & development

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Design tools & simulation

SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
View details
CALCULATION TOOL Download
Jitter and SNR Calculator for ADCs
JITTER-SNR-CALC — JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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SOIC (DW) 28 View options

Ordering & quality

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