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ADS7056

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14-bit 2.5-MSPS ultra-low-power ultra-small-size SAR ADC with SPI

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Data sheet

ADS7056

ACTIVE
Data sheet Order now

Product details

Resolution (Bits) 14 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 3.6 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 3.5 Analog supply (min) (V) 2.35 Analog supply voltage (max) (V) 3.6 SNR (dB) 74.9 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
Resolution (Bits) 14 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 3.6 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 3.5 Analog supply (min) (V) 2.35 Analog supply voltage (max) (V) 3.6 SNR (dB) 74.9 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
X2QFN (RUG) 8 2.25 mm² 1.5 x 1.5
  • 2.5-MSPS Throughput
  • Ultra-Small Size SAR ADC:
    • X2QFN-8 Package with 2.25-mm2 Footprint
  • Wide Operating Range:
    • AVDD: 2.35 V to 3.6 V
    • DVDD: 1.65 V to 3.6 V (Independent of AVDD)
    • Temperature Range: –40°C to +125°C
  • Unipolar Input Range: 0 V to AVDD
  • Excellent Performance:
    • 14-Bit NMC DNL, ±2-LSB INL
    • 74.5-dB SINAD at 2-kHz
    • 73.7-dB SINAD at 1-MHz
  • Ultra-Low Power Consumption:
    • 3.5 mW at 2.5-MSPS with 3.3-V AVDD
    • 158 µW at 100-kSPS with 3.3-V AVDD
  • Integrated Offset Calibration
  • SPI-Compatible Serial Interface: 60-MHz
  • JESD8-7A Compliant Digital I/O
  • 2.5-MSPS Throughput
  • Ultra-Small Size SAR ADC:
    • X2QFN-8 Package with 2.25-mm2 Footprint
  • Wide Operating Range:
    • AVDD: 2.35 V to 3.6 V
    • DVDD: 1.65 V to 3.6 V (Independent of AVDD)
    • Temperature Range: –40°C to +125°C
  • Unipolar Input Range: 0 V to AVDD
  • Excellent Performance:
    • 14-Bit NMC DNL, ±2-LSB INL
    • 74.5-dB SINAD at 2-kHz
    • 73.7-dB SINAD at 1-MHz
  • Ultra-Low Power Consumption:
    • 3.5 mW at 2.5-MSPS with 3.3-V AVDD
    • 158 µW at 100-kSPS with 3.3-V AVDD
  • Integrated Offset Calibration
  • SPI-Compatible Serial Interface: 60-MHz
  • JESD8-7A Compliant Digital I/O

The ADS7056 is a 14-bit, 2.5-MSPS, analog-to-digital converter (ADC). The device includes a capacitor-based, successive-approximation register (SAR) ADC that supports a wide analog input voltage range (0 V to AVDD, for AVDD in the range of 2.35 V to 3.6 V).

The SPI-compatible serial interface is controlled by the CS and SCLK signals. The input signal is sampled with the CS falling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interfacing to a variety of host controllers. The ADS7056 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V).

The ADS7056 is available in an 8-pin, miniature, X2QFN package and is specified over the extended industrial temperature range (–40°C to +125°C). Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained and battery-powered applications.

The ADS7056 is a 14-bit, 2.5-MSPS, analog-to-digital converter (ADC). The device includes a capacitor-based, successive-approximation register (SAR) ADC that supports a wide analog input voltage range (0 V to AVDD, for AVDD in the range of 2.35 V to 3.6 V).

The SPI-compatible serial interface is controlled by the CS and SCLK signals. The input signal is sampled with the CS falling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interfacing to a variety of host controllers. The ADS7056 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V).

The ADS7056 is available in an 8-pin, miniature, X2QFN package and is specified over the extended industrial temperature range (–40°C to +125°C). Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained and battery-powered applications.
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Technical documentation

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Type Title Date
* Data sheet ADS7056 Ultra-Low Power, Ultra-Small Size, 14-Bit, High-Speed SAR ADC datasheet PDF | HTML 30 Mar 2017
More literature Precision ADCs for Motor Encoders and Position Sensing PDF | HTML 27 Mar 2023
User guide ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, and ADS7057EVM-PDK Evaluation Module (Rev. A) PDF | HTML 13 Jan 2022
Circuit design Driving a low-voltage single-ended SAR ADC circuit with high-voltage input 10 Jun 2019
Circuit design Driving a SAR ADC directly without a front-end buffer circuit (Rev. A) 06 Mar 2019
Circuit design Low-power sensor measurements: 3.3-V, 1-ksps, 12-bit, single-ended, dual-supply (Rev. A) 06 Mar 2019
Circuit design Low-power sensor measurements: 3.3-V, 1-ksps, 12-bit, single-ended, single-suppl (Rev. A) 06 Mar 2019
Application note Improving Response Time and Accuracy in Autonomous Robots With Wideband SAR-ADCs 03 Oct 2018
Circuit design High-side current shunt monitor circuit to 3-V single-ended ADC 06 Jan 2018
Analog Design Journal Using interleaving with SAR ADCs for lower power, smaller size and lower cost 24 Oct 2017
Application note Optimized Sensor Measurement: Driving a SAR ADC Input Without a Driver Amplifier 01 Sep 2017
Application note Low-Cost, Low-Power, Small 14-bit AFE: Interleaved ADCs Scalable up to 7.5 MSPS 26 May 2017
Technical article Leverage coherent sampling and FFT windows when evaluating SAR ADCs (Part 1) 13 Mar 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS7057EVM-PDK — ADS7057 14-Bit, 2.5MSPS, Small-Size Low-Power SAR ADC Performance Demonstration Kit (PDK)

The ADS7057 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the 14-bit, ADS7057 successive approximation register (SAR) analog-to-digital converter (ADC).

The PDK includes the ADS7057 evaluation board, precision host interface (PHI) controller board, and (...)

User guide: PDF | HTML
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Support software

Source Files for SBAA371

SBAC248.ZIP (53 KB)
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Simulation model

ADS7056 IBIS Model

SBAM317.ZIP (27 KB) - IBIS Model
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Simulation model

ADS7056 TINA-TI Reference Design

SBAM318.TSC (290 KB) - TINA-TI Reference Design
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Simulation model

ADS7056 TINA-TI Transient Spice Model

SBAM316.ZIP (68 KB) - TINA-TI Spice Model
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Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and (...)
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Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
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Reference designs

TIDA-01355 — Analog Front-End Reference Design for Imaging Using Time-Interleaved SAR ADCs with 73dB SNR, 7.5MSPS

This reference design demonstrates how to achieve multiple ADC interleaving with high sampling rates and good resolution at low BOM-cost. The reference design was built with electronic imaging systems in mind. High definition imaging and other high speed signal processing applications require ADCs (...)
Design guide: PDF
Schematic: PDF
Package Pins Download
X2QFN (RUG) 8 View options
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