Single, Audio Differential Line Receivers, +-6dB (G=1/2 or 2)


Product details


Number of channels (#) 1 Gain (V/V) 0.5, 2 CMRR Rs=0Ω (Min) (dB) 74 THD + N @ 1 kHz (%) 0.0005 Noise floor (RTO, 20 kHz BW) (dBu) -106 Differential input impedance (kΩ) 24 Common mode input impedance (kΩ) 18 Slew rate (Typ) (V/us) 14 Supply voltage (Max) (V) 36 Supply voltage (Min) (V) 8 Iq per channel (Typ) (mA) 2.4 Small-Signal bandwidth (Typ) (MHz) 4 Operating temperature range (C) -40 to 85 open-in-new Find other Audio line receivers

Package | Pins | Size

PDIP (P) 8 93 mm² 9.81 x 9.43 SOIC (D) 8 19 mm² 3.91 x 4.9 open-in-new Find other Audio line receivers
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INA592 ACTIVE High-precision (40µV offset), 2-MHz, 88dB CMRR, low-power, e-trim difference amplifier This device offers higher precision (40-µV, 2-µV/⁰C), higher slew rate (18-V/µs), and lower quiescent current (1.2-mA)

Technical documentation

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Type Title Date
* Datasheet Audio Differential Line Receivers, ±6dB (G=1/2 or 2) datasheet Sep. 27, 2000
User guides Universal Difference Amplifier Evaluation Module User's Guide Oct. 16, 2018
White papers The Signal e-book: A compendium of blog posts on op amp design topics Mar. 28, 2017
Application notes High-Voltage Signal Conditioning for Low Voltage ADCs Jun. 15, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
Be confident in your choice of difference amplifier and easily evaluate and compare devices with the DIFFAMP-EVM. With support for a variety of configurations, this module can be tailored towards your desired application for a reliable evaluation. A DIP adapter section is provided to enable (...)
  • Intuitive jumper configuration as difference amplifier, precision gain amplifier, or current source
  • Socketed IC connection for multi-package evaluation and easy comparison between devices
  • 6 DIP adapter boards supporting SOIC and MSOP packages
  • Onboard reference buffer for single supply operation

Design tools & simulation

SBFC022A.ZIP (4 KB) - TINA-TI Spice Model
SBOC150B.TSC (86 KB) - TINA-TI Reference Design
SBOM028A.ZIP (57 KB) - PSpice Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
PDIP (P) 8 View options
SOIC (D) 8 View options

Ordering & quality

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