14-Bit, 105-MSPS Analog-to-Digital Converter (ADC)


Product details


Sample rate (Max) (MSPS) 105 Resolution (Bits) 14 Number of input channels 1 Analog input BW (MHz) 750 Features High Performance Rating Catalog Input range (Vp-p) 2.3 Power consumption (Typ) (mW) 710 Architecture Pipeline SNR (dB) 73.6 ENOB (Bits) 11.7 SFDR (dB) 86 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

HTQFP (PAP) 64 144 mm² 12 x 12 open-in-new Find other High-speed ADCs (>10MSPS)


  • 14-Bit Resolution
  • 105MSPS Sample Rate
  • High SNR: 72dBFS at 100MHz fIN
  • High SFDR: 86dBc at 100MHz fIN
  • 2.3VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3V Single-Supply Voltage
  • Analog Power Dissipation: 571mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Pin-Compatible With:
    • ADS5500 (14-Bit, 125MSPS)
    • ADS5542 (14-Bit, 80MSPS)
    • ADS5520 (12-Bit, 125MSPS)
    • ADS5521 (12-Bit, 105MSPS)
    • ADS5522 (12-Bit, 80MSPS)
  • Recommended Op Amps:
    • OPA695, OPA847, THS3202, THS3201, THS4503, THS4509, THS9001
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment
    • Military Equipment

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open-in-new Find other High-speed ADCs (>10MSPS)


The ADS5541 is a high-performance, 14-bit, 105MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in a small space, the ADS5541 has excellent analog power dissipation of 571mW at 3.3V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. The parallel CMOS compatible outputs ensure seamless interfacing with common logic.

The ADS5541 is available in a TQFP-64 PowerPAD package over the industrial temperature range.

open-in-new Find other High-speed ADCs (>10MSPS)

Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software development


Design tools & simulation

SBAC028C.ZIP (343 KB) - IBIS Model
Jitter and SNR Calculator for ADCs
JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

CAD/CAE symbols

Package Pins Download
HTQFP (PAP) 64 View options

Ordering & quality

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