ADS5232

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Dual-Channel, 12-Bit, 65-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 65 Resolution (Bits) 12 Number of input channels 2 Interface type Parallel CMOS Analog input BW (MHz) 300 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 335 Architecture Pipeline SNR (dB) 70.7 ENOB (Bits) 11.3 SFDR (dB) 86 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

TQFP (PAG) 64 144 mm² 12 x 12 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Single +3.3V Supply
  • High SNR: 70.7dBFS at fIN = 5MHz
  • Total Power Dissipation:
    Internal Reference: 371mW
    External Reference: 335mW
  • Internal or External Reference
  • Low DNL: ±0.3LSB
  • Flexible Input Range: 1.5VPP to 2VPP
  • TQFP-64 Package
  • APPLICATIONS
    • Communications IF Processing
    • Communications Base Stations
    • Test Equipment
    • Medical Imaging
    • Video Digitizing
    • CCD Digitizing

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open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS5232 is a dual, high-speed, high dynamic range, 12-bit pipelined analog-to-digital converter (ADC). This converter includes a high-bandwidth sample-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of the sample-and-hold amplifier and ADC circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity.

The ADS5232 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled, allowing low-drive, external references to be used for improved tracking in multichannel systems.

The ADS5232 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front-end gain control circuitry. There is also an output enable pin to allow for multiplexing and testing on a PC board.

The ADS5232 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. The ADS5232 is available in a TQFP-64 package.

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 14
Type Title Date
* Datasheet Dual, 12-Bit, 65MSPS, +3.3V Analog-to-Digital Converter datasheet (Rev. A) Mar. 28, 2006
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Technical articles How to minimize filter loss when you drive an ADC Oct. 20, 2016
Application notes Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) May 22, 2015
Application notes Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) Jul. 19, 2013
Application notes Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application notes Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application notes CDCE62005 as Clock Solution for High-Speed ADCs Sep. 04, 2008
Application notes CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application notes Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
User guides ADS5231/32/37 EVM (Rev. B) Nov. 14, 2007
User guides ADS5231/32EVM User's Guide (Rev. A) Jun. 26, 2007

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The ADS5232EVM is designed to provide ease of use in evaluating the performance of the dual 12-bit, 65 MSPS analog to digital converter which features a CMOS outputs. The ADS5232EVM can be paired with the ADC digital capture card, the TSW1100, for quick evaluation of the device's performance.

Features
  • Easy testing of the ADS5232
  • Single-ended, transformer coupled inputs
  • THS4503 amplifier input path
  • Internal reference generation or external reference generation using the OPA2227
  • Fully buffered outputs utilizing the SN74AVC16244
  • Compatible with the TSW1100

Design tools & simulation

SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
CALCULATION TOOLS Download
Analog-to-digital converter (ADC) harmonic calculator
ADC-HARMONIC-CALC

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

CALCULATION TOOLS Download
Jitter and SNR Calculator for ADCs
JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

CAD/CAE symbols

Package Pins Download
TQFP (PAG) 64 View options

Ordering & quality

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