ADS5522

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12-Bit, 80-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 80 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features Low Power Rating Catalog Input range (Vp-p) 2.3 Power consumption (Typ) (mW) 660 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

HTQFP (PAP) 64 144 mm² 12 x 12 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • 12-Bit Resolution
  • 80 MSPS Sample Rate
  • High SNR: 69.7 dBFS at 100 MHz fIN
  • High SFDR: 83 dBc at 100 MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 541 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Op Amps:
    OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments.

open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS5522 is a high-performance, 12-bit, 80 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5522 has excellent power consumption of 541 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5522 is available in a 64-pin TQFP PowerPAD package over the industrial temperature range.

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 15
Type Title Date
* Datasheet 12-Bit, 80MSPS Analog-to-Digital Converter datasheet (Rev. C) Feb. 08, 2007
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Technical articles How to minimize filter loss when you drive an ADC Oct. 20, 2016
Application notes Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) May 22, 2015
Application notes Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) Jul. 19, 2013
Application notes Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application notes Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application notes CDCE62005 as Clock Solution for High-Speed ADCs Sep. 04, 2008
Application notes CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application notes Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
User guides ADS5500/5541/5542/5520/5521/5522 14-&12-Bit Single Channel ADC w/LVDT1422 Output Jul. 26, 2006
Application notes Clocking High-Speed Data Converters Jan. 18, 2005
User guides ADS5522 EVM Apr. 02, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software development

PROGRAMMING TOOLS Download

Design tools & simulation

SIMULATION MODELS Download
SBAC028C.ZIP (343 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
CALCULATION TOOLS Download
Jitter and SNR Calculator for ADCs
JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

CAD/CAE symbols

Package Pins Download
HTQFP (PAP) 64 View options

Ordering & quality

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