12-Bit, 20-MSPS Analog-to-Digital Converter (ADC)
Product details
Parameters
Package | Pins | Size
Features
- HIGH SFDR: 74dB at 9.8MHz fIN
- HIGH SNR: 68dB
- LOW POWER: 300mW
- LOW DLE: 0.25LSB
- FLEXIBLE INPUT RANGE
- OVER-RANGE INDICATOR
- APPLICATIONS
- STUDIO CAMERAS
- IF AND BASEBAND DIGITIZATION
- COPIERS
- TEST INSTRUMENTATION
Description
The ADS805 is a 20MHz, high dynamic range, 12-bit, pipelined Analog-to-Digital Converter ADC. This converter includes a high-bandwidth track-and-hold that gives excellent spurious performance up to and beyond the Nyquist rate. This high-bandwidth, linear track-and-hold minimizes harmonics and has low jitter, leading to excellent Signal-to-Noise Ratio (SNR) performance. The ADS805 is also pin-compatible with the 10MHz ADS804 and the 5MHz ADS803.
The ADS805 provides an internal reference or an external reference can be used. The ADS805 can be programmed for a 2Vp-p input range which is the easiest to drive with a single op amp and provides the best spurious performance. Alternatively, the 5Vp-p input range can be used for the lowest input-referred noise of 0.09LSBs rms giving superior imaging performance. There is also the capability to set the input range between 2Vp-p and 5Vp-p, either single-ended or differential. The ADS805 also provides an over-range flag that indicates when the input signal has exceeded the converters full-scale range. This flag can also be used to reduce the gain of the front end signal conditioning circuitry.
The ADS805 employs digital error techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for communications, medical imaging, video, and test instrumentation applications. The ADS805 is available in an SSOP-28 package.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | 12-Bit, 20MHz Sampling Analog-To-Digital Converter datasheet (Rev. B) | Jul. 18, 2002 |
Technical articles | Keys to quick success using high-speed data converters | Oct. 13, 2020 | |
Technical articles | How to achieve fast frequency hopping | Mar. 03, 2019 | |
Technical articles | RF sampling: Learning more about latency | Feb. 09, 2017 | |
Technical articles | Why phase noise matters in RF sampling converters | Nov. 28, 2016 | |
Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | Sep. 10, 2010 | |
Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | Apr. 28, 2009 | |
Application note | CDCE62005 as Clock Solution for High-Speed ADCs | Sep. 04, 2008 | |
Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | Jun. 08, 2008 | |
Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | Jun. 02, 2008 | |
User guide | DEM-ADS80xU Evaluation Fixture (Rev. A) | Apr. 05, 2007 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SSOP (DB) | 28 | View options |
Ordering & quality
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- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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