Product details

Sample rate (Max) (MSPS) 125 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features High Performance Rating Catalog Input range (Vp-p) 2.3 Power consumption (Typ) (mW) 780 Architecture Pipeline SNR (dB) 73.2 ENOB (Bits) 11.3 SFDR (dB) 84 Operating temperature range (C) -40 to 85 Input buffer No
Sample rate (Max) (MSPS) 125 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features High Performance Rating Catalog Input range (Vp-p) 2.3 Power consumption (Typ) (mW) 780 Architecture Pipeline SNR (dB) 73.2 ENOB (Bits) 11.3 SFDR (dB) 84 Operating temperature range (C) -40 to 85 Input buffer No
HTQFP (PAP) 64 100 mm² 10 x 10
  • 14-Bit Resolution
  • 125 Msps Sample Rate
  • High SNR: 71.2 dBFS at 100-MHz fIN
  • High SFDR: 82 dBc at 100-MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 578 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Amplifiers: OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments.

  • 14-Bit Resolution
  • 125 Msps Sample Rate
  • High SNR: 71.2 dBFS at 100-MHz fIN
  • High SFDR: 82 dBc at 100-MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 578 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Amplifiers: OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments.

The ADS5500 is a high-performance, 14-bit, 125 Msps analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5500 has excellent power consumption of 578 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5500 is available in a 64-pin TQFP PowerPAD™ package and in both a commercial and industrial temperature grade device.

The ADS5500 is a high-performance, 14-bit, 125 Msps analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5500 has excellent power consumption of 578 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5500 is available in a 64-pin TQFP PowerPAD™ package and in both a commercial and industrial temperature grade device.

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Technical documentation

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Type Title Date
* Data sheet 14-Bit, 125MSPS Analog-to-Digital Converter datasheet (Rev. F) 08 Feb 2007
Technical article Keys to quick success using high-speed data converters 13 Oct 2020
Technical article How to achieve fast frequency hopping 03 Mar 2019
Technical article RF sampling: Learning more about latency 09 Feb 2017
Technical article Why phase noise matters in RF sampling converters 28 Nov 2016
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
User guide ADS5500/5541/5542/5520/5521/5522 14-&12-Bit Single Channel ADC w/LVDT1422 Output 26 Jul 2006
Analog design journal Low-power, high-intercept interface to the ADS5424, 105-MSPS converter 10 Oct 2005
User guide ADS5500/5541/5542/5520/5521/5522 14- and 12-Bit Single Channel ADC EVM (Rev. C) 27 Sep 2005
Analog design journal 14-Bit, 125-MSPS ADS5500 Evaluation 18 Jan 2005
Analog design journal Clocking High-Speed Data Converters 18 Jan 2005
Application note Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC Dev 25 Jun 2004
More literature ADS5500 + CDC7005 Product Bulletin 23 Jun 2004
Application note ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers 22 Apr 2004
More literature Analogue-to-Digital Converters Support Multicarrier Systems 02 Mar 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software programming tool

HSADC-SPI-UTILITY — High Speed ADC SPI Programming Tool

Simulation model

ADS55xx IBIS Model (Rev. C)

SBAC028C.ZIP (343 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Calculation tool

JITTER-SNR-CALC — Jitter and SNR Calculator for ADCs

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
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HTQFP (PAP) 64 View options

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