Product details

Resolution (Bits) 24 Number of input channels 1 Sample rate (Max) (kSPS) 1000 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-Ended Multi-channel configuration Rating Catalog TI functional safety category Functional Safety-Capable Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Analog voltage AVDD (Min) (V) 2.85 SNR (dB) 110 Analog voltage AVDD (Max) (V) 5.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
Resolution (Bits) 24 Number of input channels 1 Sample rate (Max) (kSPS) 1000 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-Ended Multi-channel configuration Rating Catalog TI functional safety category Functional Safety-Capable Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Analog voltage AVDD (Min) (V) 2.85 SNR (dB) 110 Analog voltage AVDD (Max) (V) 5.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
TSSOP (PW) 20 42 mm² 6.5 x 6.4 WQFN (RUK) 20 9 mm² 3 x 3
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with DC precision:
    • Dynamic range: 111.5 dB (200 kSPS)
    • THD: –120 dB
    • INL: 0.9 ppm of FS
    • Offset drift: 50 nV/°C
    • Gain drift: 0.6 ppm/°C
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with DC precision:
    • Dynamic range: 111.5 dB (200 kSPS)
    • THD: –120 dB
    • INL: 0.9 ppm of FS
    • Offset drift: 50 nV/°C
    • Gain drift: 0.6 ppm/°C
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable

The ADS127L11 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, allowing wideband ac performance or data throughput for dc signals to be optimized, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN and 6.5-mm × 4.4-mm TSSOP packages are designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

The ADS127L11 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, allowing wideband ac performance or data throughput for dc signals to be optimized, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN and 6.5-mm × 4.4-mm TSSOP packages are designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

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Technical documentation

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Type Title Date
* Data sheet ADS127L11 400-kSPS, Wide-Bandwidth, 24-Bit, Delta-Sigma ADC datasheet (Rev. A) 29 Oct 2021
Functional safety information ADS127L11 Functional Safety FIT Rate, FMD and Pin FMA 28 Sep 2021
Application note ADS127L11 in Simultaneous-Sampling Systems 12 Jul 2021
User guide ADS127L11EVM-PDK Evaluation Module User's Guide 13 Apr 2020

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS127L11EVM-PDK — ADS127L11 evaluation module for ADC with easy-to-drive inputs and wideband or low-latency filters

The ADS127L11 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the ADS127L11, which is a 24-bit, high-speed, wide-bandwidth, delta-sigma (ΔΣ) analog-to-digital converter (ADC).

The PDK includes the ADS127L11 evaluation board, precision host interface (PHI) (...)

Support software

ADS127L11 C Example Code

SBAC296.ZIP (61 KB)
Simulation model

ADS127L11 IBIS Model

SBAM459.ZIP (105 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Calculation tool

ADS127L11 Design Calculator

SBAR019.ZIP (121 KB)
Package Pins Download
TSSOP (PW) 20 View options
WQFN (RUK) 20 View options

Ordering & quality

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