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High-speed ADCs (≥10 MSPS)

ADS4245-EP

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Dual-Channel, 14-Bit, 125-MSPS Analog-to-Digital Converter (ADC)- Enhanced Product

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Data sheet

ADS4245-EP

ACTIVE
Data sheet Order now

Product details

Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 600 Features Low Power Rating HiRel Enhanced Product Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 277 Architecture Pipeline SNR (dB) 73.4 ENOB (Bits) 11.5 SFDR (dB) 88 Operating temperature range (°C) -55 to 125 Input buffer No
Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 600 Features Low Power Rating HiRel Enhanced Product Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 277 Architecture Pipeline SNR (dB) 73.4 ENOB (Bits) 11.5 SFDR (dB) 88 Operating temperature range (°C) -55 to 125 Input buffer No
VQFN (RGC) 64 81 mm² (9 mm × 9 mm)
  • Ultralow Power with Single 1.8V Supply, CMOS Output:
    • 277mW total power at 125MSPS
  • High Dynamic Performance:
    • 88dBc SFDR at 170MHz
    • 71.4dBFS SNR at 170MHz
  • Crosstalk: > 90dB at 185MHz
  • Programmable Gain up to 6dB for SNR/SFDR Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8V parallel CMOS interface
    • Double data rate (DDR) LVDS with programmable swing:
      • Standard swing: 350mV
      • Low swing: 200mV
  • Supports Low Input Clock Amplitude Down to 200mVPP
  • Supports Defense, Aerospace, and Medical Applications
    • Controlled Baseline
    • One Assembly and Test Site
    • One Fabrication Site
    • Available in Military (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • Ultralow Power with Single 1.8V Supply, CMOS Output:
    • 277mW total power at 125MSPS
  • High Dynamic Performance:
    • 88dBc SFDR at 170MHz
    • 71.4dBFS SNR at 170MHz
  • Crosstalk: > 90dB at 185MHz
  • Programmable Gain up to 6dB for SNR/SFDR Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8V parallel CMOS interface
    • Double data rate (DDR) LVDS with programmable swing:
      • Standard swing: 350mV
      • Low swing: 200mV
  • Supports Low Input Clock Amplitude Down to 200mVPP
  • Supports Defense, Aerospace, and Medical Applications
    • Controlled Baseline
    • One Assembly and Test Site
    • One Fabrication Site
    • Available in Military (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

The ADS4245 is a low-speed variant of the ADS42xx ultralow-power family of dual-channel, 14-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8V supply. This topology makes the ADS4245 well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS4245 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. These device includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR (double data rate) LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64 PowerPAD™ package.

The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS4245 is specified over the military temperature range (–55°C to 125°C).

The ADS4245 is a low-speed variant of the ADS42xx ultralow-power family of dual-channel, 14-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8V supply. This topology makes the ADS4245 well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS4245 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. These device includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR (double data rate) LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64 PowerPAD™ package.

The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS4245 is specified over the military temperature range (–55°C to 125°C).
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet ADS4245-EP Dual-Channel, 14-Bit, 125MSPS Ultralow-Power ADC datasheet (Rev. B) PDF | HTML Oct 21, 2020
* Radiation & reliability report ADS4245MRGC25EP Reliability Report Dec 16, 2014
* VID ADS4245-EP VID V6214609 Jun 21, 2016

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