2.7V-to-5.5V 16-Bit 500kSPS Serial Analog-to-Digital Converter (ADC)
Product details
Parameters
Package | Pins | Size
Features
- 2.7-V to 5.5-V Analog Supply, Low Power:
- 10.6 mW (500 kHz, +VA = 2.7 V,
+VBD = 1.8 V)
- 10.6 mW (500 kHz, +VA = 2.7 V,
- 500-kHz Sampling Rate
- Excellent DC Performance
- ±1.5 LSB Typ, ±2 LSB Max INL
- ±0.6 LSB Typ, ±1 LSB Max DNL
- 16-Bit NMC Over Temperature
- ±0.5 mV Max Offset Error at 2.7 V
- ±1 mV Max Offset Error at 5 V
- Excellent AC Performance at fI = 10 kHz with 91 dB SNR, 100 dB SFDR, –96 dB THD
- Built-In Conversion Clock (CCLK)
- 1.65 V to 1.5×(+VA) I/O Supply
- SPI/DSP Compatible Serial
- SCLK up to 50 MHz
- Comprehensive Power-Down Modes:
- Deep Power-Down
- Nap Power-Down
- Auto Nap Power-Down
- Unipolar Input Range: 0 V to VREF
- Software Reset
- Global CONVST (Independent of CS)
- Programmable Status/Polarity EOC/INT
- 16-Pin 4×4 QFN or 16-Pin TSSOP Packages
- Multi-Chip Daisy Chain Mode
- Programmable TAG Bit Output
- Auto/Manual Channel Select Mode
- Communications
- Transducer Interface
- Medical Instruments
- Magnetometers
- Industrial Process Control
- Data Acquisition Systems
- Automatic Test Equipment
Description
The ADS8327 is a low power, 16-bit, 500-kSPS analog-to-digital converter with a unipolar input. The device includes a 16-bit capacitor-based SAR A/D converter with inherent sample and hold.
The ADS8328 is based on the same core and includes a 2-to-1 input MUX with programmable option of TAG bit output. Both the ADS8327 and ADS8328 offer a high-speed, wide voltage serial interface and are capable of chain mode operation when multiple converters are used.
These converters are available in a 16-lead TSSOP or 4×4 QFN packages and are fully specified for operation over the industrial –40°C to +85°C temperature range.
Technical documentation
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View all 6 | Type | Title | Date | |
|---|---|---|---|
| * | Data sheet | Low Power, 16-Bit, 500-kHz, Single/Dual Unipolar Input, ADC w/Serial I/F datasheet (Rev. E) | Jan. 27, 2011 |
| White paper | Voltage-reference impact on total harmonic distortion | Aug. 01, 2016 | |
| E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | May 21, 2015 | |
| Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | Mar. 17, 2011 | |
| Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | Nov. 10, 2010 | |
| Application note | Using the ADS8327 with the TMS320C6713 DSP | Dec. 18, 2006 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
SLAM115.ZIP (80 KB) - IBIS Model
SLAM312.ZIP (37 KB) - TINA-TI Spice Model
SLAM313.TSC (4245 KB) - TINA-TI Reference Design
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
TINA-TI — TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
ADC-INPUT-CALC — ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and transformer-coupled (...)
ANALOG-ENGINEER-CALC — The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Features
- Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
- Noise calculations
- Common unit translation
- Solves common amplifier circuit design problems
- Gain selections using standard resistors
- Filter configurations
- Total noise for common amplifier configurations
- (...)
JITTER-SNR-CALC — JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| QFN (RSA) | 16 | View options |
| TSSOP (PW) | 16 | View options |
Ordering & quality
Information included:
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
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