Product details

Resolution (Bits) 12 Number of input channels 8 Sample rate (Max) (kSPS) 1000 Interface type SPI Architecture SAR Input type Single-Ended Multi-channel configuration Multiplexed Rating Catalog Reference mode Supply Input range (Max) (V) 5.5 Input range (Min) (V) 0 Features Comparator, GPIO, Oscillator, Small Size Operating temperature range (C) -40 to 85 Power consumption (Typ) (mW) 5 Analog voltage AVDD (Min) (V) 2.35 SNR (dB) 69 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 2 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
Resolution (Bits) 12 Number of input channels 8 Sample rate (Max) (kSPS) 1000 Interface type SPI Architecture SAR Input type Single-Ended Multi-channel configuration Multiplexed Rating Catalog Reference mode Supply Input range (Max) (V) 5.5 Input range (Min) (V) 0 Features Comparator, GPIO, Oscillator, Small Size Operating temperature range (C) -40 to 85 Power consumption (Typ) (mW) 5 Analog voltage AVDD (Min) (V) 2.35 SNR (dB) 69 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 2 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
WQFN (RTE) 16 9 mm² 3 x 3
  • Small package size:
    • WQFN 3 mm × 3 mm
  • 8 channels configurable as any combination of:
    • Up to 8 analog inputs, digital inputs, or digital outputs
  • GPIOs for I/O expansion:
    • Open-drain, push-pull digital outputs
  • Analog watchdog:
    • Programmable thresholds per channel
    • Event counter for transient rejection
  • Wide operating ranges:
    • AVDD: 2.35 V to 5.5 V
    • DVDD: 1.65 V to 5.5 V
    • –40°C to +85°C temperature range
  • Enhanced-SPI digital interface:
    • High-speed, 60-MHz interface
    • Achieve full throughput with >13.5-MHz SPI
  • CRC for read/write operation:
    • CRC on data read/write
    • CRC on power-up configuration
  • Programmable averaging filters
  • Root-mean-square module:
    • 16-bit true RMS output
    • Programmable RMS time window
  • Zero-crossing-detect module:
    • ZCD output corresponding to analog input
    • Built-in transient rejection and hysteresis
    • Digitally adjustable detection threshold
  • Small package size:
    • WQFN 3 mm × 3 mm
  • 8 channels configurable as any combination of:
    • Up to 8 analog inputs, digital inputs, or digital outputs
  • GPIOs for I/O expansion:
    • Open-drain, push-pull digital outputs
  • Analog watchdog:
    • Programmable thresholds per channel
    • Event counter for transient rejection
  • Wide operating ranges:
    • AVDD: 2.35 V to 5.5 V
    • DVDD: 1.65 V to 5.5 V
    • –40°C to +85°C temperature range
  • Enhanced-SPI digital interface:
    • High-speed, 60-MHz interface
    • Achieve full throughput with >13.5-MHz SPI
  • CRC for read/write operation:
    • CRC on data read/write
    • CRC on power-up configuration
  • Programmable averaging filters
  • Root-mean-square module:
    • 16-bit true RMS output
    • Programmable RMS time window
  • Zero-crossing-detect module:
    • ZCD output corresponding to analog input
    • Built-in transient rejection and hysteresis
    • Digitally adjustable detection threshold

The ADS7028 is an easy-to-use, 8-channel, multiplexed, 12-bit, 1-MSPS, successive approximation register analog-to-digital converter (SAR ADC). The eight channels can be independently configured as either analog inputs, digital inputs, or digital outputs. The device has an internal oscillator for the ADC conversion process.

The ADS7028 communicates through an SPI-compatible interface and operates in either autonomous or single-shot conversion mode. The ADS7028 implements the analog watchdog function by event-triggered interrupts per channel using a digital window comparator with programmable high and low thresholds, hysteresis, and an event counter. The ADS7028 has a built-in cyclic redundancy check (CRC) for data read/write operations and the power-up configuration. The ADS7028 features a root-mean-square (RMS) module that computes a 16-bit true RMS result for any analog input channel. The integrated zero-crossing-detect (ZCD) module allows for transient rejection and hysteresis near the configurable threshold crossings.

The ADS7028 is an easy-to-use, 8-channel, multiplexed, 12-bit, 1-MSPS, successive approximation register analog-to-digital converter (SAR ADC). The eight channels can be independently configured as either analog inputs, digital inputs, or digital outputs. The device has an internal oscillator for the ADC conversion process.

The ADS7028 communicates through an SPI-compatible interface and operates in either autonomous or single-shot conversion mode. The ADS7028 implements the analog watchdog function by event-triggered interrupts per channel using a digital window comparator with programmable high and low thresholds, hysteresis, and an event counter. The ADS7028 has a built-in cyclic redundancy check (CRC) for data read/write operations and the power-up configuration. The ADS7028 features a root-mean-square (RMS) module that computes a 16-bit true RMS result for any analog input channel. The integrated zero-crossing-detect (ZCD) module allows for transient rejection and hysteresis near the configurable threshold crossings.

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Technical documentation

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Type Title Date
* Data sheet ADS7028 Small, 8-Channel, 12-Bit ADC with SPI Interface, GPIOs, and CRC datasheet (Rev. A) PDF | HTML 30 Apr 2020
Application note Resolution-Boosting ADS7138 Using Programmable Averaging Filter 01 Dec 2019
User guide BP-ADS7128 BoosterPack™ Plug-In Module User's Guide 21 May 2019
Application note Zero-Crossing Detection with False Trigger Avoidance 09 Jan 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS7038Q1EVM-PDK — ADS7038-Q1 8-channel, 1-MSPS, 12-bit ADC evaluation module performance demonstration kit (PDK)

The ADS7038-Q1 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS7038-Q1 successive approximation register (SAR) analog-to-digital converter (ADC). ADS7038Q1EVM-PDK provides power and a communications card to easily connect to the (...)

User guide: PDF | HTML
Support software

ADS7128 C Header File

SBAC284.ZIP (47 KB)
Simulation model

ADS7028 IBIS Model

SBAM438.ZIP (71 KB) - IBIS Model
Simulation model

TLA2528 TINA-TI Reference Design

SBAM432.TSC (272 KB) - TINA-TI Reference Design
Simulation model

TLA2528 TINA-TI Spice Model

SBAM431.ZIP (11 KB) - TINA-TI Spice Model
Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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Calculation tool

ADS7xx8 CRC Calculator

SBAR008.ZIP (36 KB)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Reference designs

TIDA-00420 — ADC-based, digitally-isolated, wide-input, 16-channel, AC/DC binary input reference design

This reference design showcases a cost-optimized and scalable ADC-based AC/DC binary input module (BIM) architecture with reinforced isolation. The 16 channels of a 10- or 12-bit SAR ADC are used for sensing multiple binary inputs. The op amps, in addition to keeping the cost per-channel low, (...)
Design guide: PDF
Schematic: PDF
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WQFN (RTE) 16 View options

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