Product details

Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 96 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 96 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RGE) 24 16 mm² 4 x 4
  • Sample Rate: 2.5 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.25 LSB
    • DNL: ±0.6 LSB
    • SNR: 96 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2.5 MSPS (AVDD Only)
    • 15.5 mW at 2.5 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Sample Rate: 2.5 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.25 LSB
    • DNL: ±0.6 LSB
    • SNR: 96 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2.5 MSPS (AVDD Only)
    • 15.5 mW at 2.5 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS9120 is a 16-bit, 2.5-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9110 is a pin-compatible, 18-bit, 2-MSPS variant of the ADS9120.

The ADS9120 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9120 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9120 is compatible with a standard SPI Interface. The ADS9120 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

The ADS9120 is a 16-bit, 2.5-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9110 is a pin-compatible, 18-bit, 2-MSPS variant of the ADS9120.

The ADS9120 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9120 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9120 is compatible with a standard SPI Interface. The ADS9120 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet ADS9120 16-Bit, 2.5-MSPS, 15.5-mW, SAR ADC With Enhanced Performance Features datasheet (Rev. A) PDF | HTML 29 Jun 2017
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 14 Jun 2018
Application brief Improving Input Settling for Precision Data Converters 12 Dec 2017
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 12 Dec 2017
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 11 Dec 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 08 Nov 2016
White paper Voltage-reference impact on total harmonic distortion 01 Aug 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS9120EVM-PDK — ADS9120 16-Bit, 2.5MSPS, 15.5mW SAR ADC EVM Performance Demonstration Kit (PDK)

The ADS9120 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS9120 successive-approximation register analog-to-digital converter (SAR ADC). The ADS9120EVM-PDK includes the ADS9120 EVM board, the PHI controller board, and accompanying (...)

User guide: PDF
Not available on TI.com
GUI for evaluation module (EVM)

SBAC154 ADS9120EVM-PDK GUI

Supported products & hardware

Supported products & hardware

Simulation model

ADS9120 IBIS Model

SBAM297.ZIP (12 KB) - IBIS Model
Simulation model

ADS9120 TINA-TI Reference Design

SBAM299.TSC (7032 KB) - TINA-TI Reference Design
Simulation model

ADS9120 TINA-TI Spice Model

SBAM298.TSM (48 KB) - TINA-TI Spice Model
Simulation model

Impedance Spectroscopy TINA-TI Reference Design (Differential)

SBOMBM0.TSC (94 KB) - TINA-TI Reference Design
Calculation tool

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

Supported products & hardware

Supported products & hardware

Design tool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
Supported products & hardware

Supported products & hardware

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins CAD symbols, footprints & 3D models
VQFN (RGE) 24 Ultra Librarian

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