Dual-channel, low-power, precision, 50-MHz decompensated CMOS op amp
Product details
Parameters
Package | Pins | Size
Features
- Gain Bandwidth Product (GBW): 50 MHz
- Quiescent Current: 900 µA (Typical)
- Broadband Noise: 3.8 nV/√Hz
- Input Offset Drift: 1.5 µV/°C (Maximum)
- Offset Voltage: 120 µV (Typical)
- Input Bias Current: 10 pA (Maximum)
- Rail-to-Rail Output (RRO)
- Decompensated, Gain ≥ 6 V/V (Stable)
- Power Down Current: 1 µA (Maximum)
- Supply Range: 2.2 V to 5.5 V
Description
The OPA607 and OPA2607 devices are decompensated, minimum gain of 6 V/V stable, general-purpose CMOS operational amplifier with low noise of 3.8 nV/√ Hz and a GBW of 50 MHz. The low noise and wide bandwidth of the OPAx607 devices make them attractive for general-purpose applications which require a good balance between cost and performance. The high-impedance CMOS inputs make the OPAx607 devices an ideal amplifier to interface with sensors with high output impedance (for example, piezoelectric transducers).
The OPAx607 devices feature a Power Down mode with a maximum quiescent current of less than 1 µA, making the device suitable for use in portable battery-powered applications. The rail-to-rail output (RRO) of the OPAx607 devices can swing up to 8 mV from the supply rails, maximizing dynamic range.
The OPAx607 is optimized for low supply voltage operation as low as 2.2 V (±1.1 V) and up to 5.5 V (±2.75 V), and is specified over the temperature range of –40°C to +125°C.
Technical documentation
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View all 6 | Type | Title | Date | |
|---|---|---|---|
| * | Data sheet | OPAx607 50-MHz, Low-Power, Rail-to-Rail Output CMOS Operational Amplifier for Cost Sensitive Systems datasheet (Rev. J) | Apr. 16, 2021 |
| Technical article | 3 common questions when designing with high-speed amplifiers | Jul. 17, 2020 | |
| Technical article | How to reduce distortion in high-voltage, high-frequency signal generation for AWGs | Oct. 30, 2018 | |
| Technical article | What are the advantages of using JFET-input amplifiers in high-speed applications? | Jun. 19, 2018 | |
| Technical article | Unique active mux capability combines buffer and switch into one solution | Oct. 10, 2017 | |
| User guide | DEM-OPA-SO-2A User's Guide (Rev. B) | Apr. 30, 2010 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
DEM-OPA-SO-2A
Description
The DEM-OPA-SO-2A demonstration fixture helps designers evaluate the operation and performance of TI's dual, high speed, wideband operational amplifiers. This unpopulated PC board (PCB) is compatible with products offered in the 8-lead SOIC (D) package.
For more information on these types of op amps (...)
For more information on these types of op amps (...)
Design tools & simulation
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
TINA-TI — TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
ANALOG-ENGINEER-CALC — The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Features
- Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
- Noise calculations
- Common unit translation
- Solves common amplifier circuit design problems
- Gain selections using standard resistors
- Filter configurations
- Total noise for common amplifier configurations
- (...)
VOLT-DIVIDER-CALC — VOLT-DIVIDER-CALC quickly determines a set of resistors for a voltage divider. This KnowledgeBase Javascript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. This calculator can also be used to design non-inverting attentuation circuits.
(...)
Reference designs
TIDA-010203 — This reference design is a 4-kW CCM totem-pole PFC with F280049/F280025 control card and LMG342x EVM board. This design demos a robust PFC solution, which avoids isolated current sense by putting the controller's ground in the middle of a MOSFET leg. Benefitting from non-isolation, AC current sense (...)
Design files
TIDA-060019 — This reference design is a low-side, bidirectional current shunt monitor using high-speed amplifiers. It is intended for applications that could benefit from faster fault detection, single shunt motor control, higher switching frequencies, higher gain, and or reduced general ADC sampling noise. This (...)
Design files
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download TIDA-060019 BOM.pdf (56KB) -
download TIDA-060019 Assembly Drawing.pdf (146KB) -
download TIDA-060019 PCB.pdf (54KB) -
download TIDA-060019 CAD Files.zip (998KB) -
download TIDA-060019 Gerber.zip (298KB)
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| SOIC (D) | 8 | View options |
| VSSOP (DGK) | 8 | View options |
| X2QFN (RUG) | 10 | View options |
Ordering & quality
Information included:
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- REACH
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- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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