Dual channel, low power, precision, 50-MHz decompensated CMOS op amp for cost sensitive systems
Product details
Parameters
Package | Pins | Size
Features
- Gain Bandwidth Product (GBW): 50 MHz
- Quiescent Current: 900 µA (Typical)
- Broadband Noise: 3.8 nV/√Hz
- Input Offset Drift: 1.5 µV/°C (Maximum)
- Offset Voltage: 120 µV (Typical)
- Input Bias Current: 10 pA (Maximum)
- Rail-to-Rail Output (RRO)
- Decompensated, Gain ≥ 6 V/V (Stable)
- Power Down Current: 1 µA (Maximum)
- Supply Range : 2.2 V to 5.5 V
All trademarks are the property of their respective owners.
Description
The OPA607 and OPA2607 devices are decompensated, minimum gain of 6 V/V stable, general-purpose CMOS operational amplifier with low noise of 3.8 nV/√ Hz and a GBW of 50 MHz. The low noise and wide bandwidth of the OPAx607 devices make them attractive for general-purpose applications which require a good balance between cost and performance. The high-impedance CMOS inputs make the OPAx607 devices an ideal amplifier to interface with sensors with high output impedance (for example, piezoelectric transducers).
The OPAx607 devices feature a Power Down mode with a maximum quiescent current of less than 1 µA, making the device suitable for use in portable battery-powered applications. The rail-to-rail output (RRO) of the OPAx607 devices can swing up to 8 mV from the supply rails, maximizing dynamic range.
The OPAx607 is optimized for low supply voltage operation as low as 2.2 V (±1.1 V) and up to 5.5 V (±2.75 V), and is specified over the temperature range of –40°C to +125°C.
Technical documentation
| Type | Title | Date | |
|---|---|---|---|
| * | Datasheet | OPAx607 50-MHz, Low-Power, Gain of 6-V/V Stable, Rail-to-Rail Output CMOS for Cost Sensitive Systems datasheet (Rev. H) | Dec. 17, 2020 |
| Technical articles | How to reduce distortion in high-voltage, high-frequency signal generation for AWGs | Oct. 30, 2018 | |
| Technical articles | What are the advantages of using JFET-input amplifiers in high-speed applications? | Jun. 18, 2018 | |
| Technical articles | Unique active mux capability combines buffer and switch into one solution | Oct. 10, 2017 | |
| Technical articles | How to minimize filter loss when you drive an ADC | Oct. 20, 2016 | |
| User guide | DEM-OPA-SO-2A User's Guide (Rev. B) | Apr. 30, 2010 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
For more information on these types of op amps (...)
Description
The DEM-OPA268xU demonstration board is an unpopulated printed circuit board (PCB) for the high speed dual op amps in SO-8 packages.
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Features
- Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
- Noise calculations
- Common unit translation
- Solves common amplifier circuit design problems
- Gain selections using standard resistors
- Filter configurations
- Total noise for common amplifier configurations
- (...)
(...)
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| SOIC (D) | 8 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.