Product details

Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 WQFN (RUK) 20 9 mm² 3 x 3
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with dc precision:
    • Dynamic range: 111.5 dB (200 kSPS)
    • THD: –120 dB
    • INL: 0.9 ppm of FS
    • Offset drift: 50 nV/°C
    • Gain drift: 0.6 ppm/°C
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with dc precision:
    • Dynamic range: 111.5 dB (200 kSPS)
    • THD: –120 dB
    • INL: 0.9 ppm of FS
    • Offset drift: 50 nV/°C
    • Gain drift: 0.6 ppm/°C
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable

The ADS127L11 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, allowing wideband ac performance or data throughput for dc signals to be optimized, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN and 6.5-mm × 4.4-mm TSSOP packages are designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

The ADS127L11 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, allowing wideband ac performance or data throughput for dc signals to be optimized, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN and 6.5-mm × 4.4-mm TSSOP packages are designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

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Technical documentation

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* Data sheet ADS127L11 400-kSPS, Wide-Bandwidth, 24-Bit, Delta-Sigma ADC datasheet (Rev. C) PDF | HTML 06 Sep 2022
White paper Simplifying Power Architectures With Low-Noise Power Devices PDF | HTML 07 Nov 2023
Functional safety information ADS1x7L1x Functional Safety FIT Rate, FMD and Pin FMA (Rev. B) PDF | HTML 06 Jun 2023
Application note Four Channel Analog to Digital Interface with Sitara AM243x MCU+ PDF | HTML 20 Apr 2023
Technical article Using vibration monitoring, Edge AI and SPE/PoDL for predictive maintenance 11 Mar 2023
Design guide Four-Channel Synchronous IEPE Vibration Sensor Interface Reference Design PDF | HTML 28 Nov 2022
More literature PLC Analog Input Front-End Architectures PDF | HTML 31 Jul 2022
Application note THP210 and ADS127L11 Performance 28 Mar 2022
Technical article Balancing ADC size, power, resolution and bandwidth in precision data-acquisition systems 03 Dec 2021
Application note ADS127L11 in Simultaneous-Sampling Systems PDF | HTML 12 Jul 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADC-PHI-PRU-EVM — Adapter card to connect precision ADC evaluation modules to TMDS64GPEVM or TMDS243GPEVM PRU

The ADC-PHI-PRU-EVM adapter card interfaces the development platforms of the Sitara™ processor for the AM64x family (TMDS64GPEVM) or the microcontroller (MCU) for the AM243x family (TMDS243GPEVM) to more than 25 precision analog-to-digital converter (ADC) evaluation modules (EVMs) for (...)

User guide: PDF | HTML
Not available on TI.com
Evaluation board

ADS127L11EVM-PDK — ADS127L11 evaluation module for ADC with easy-to-drive inputs and wideband or low-latency filters

The ADS127L11 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the ADS127L11, which is a 24-bit, high-speed, wide-bandwidth, delta-sigma (ΔΣ) analog-to-digital converter (ADC).

The PDK includes the ADS127L11 evaluation board, precision host interface (PHI) (...)

User guide: PDF | HTML
Support software

SBAC296 ADS127L11 C Example Code

Supported products & hardware

Supported products & hardware

Products
Precision ADCs
ADS127L11 24-bit, 400-kSPS, delta-sigma ADC with easy-to-drive inputs and wideband or low-latency filters
Simulation model

ADS127L11 IBIS Model

SBAM459.ZIP (105 KB) - IBIS Model
Simulation model

ADS127L11 TINA-TI Reference Design

SBAM467.TSC (3131 KB) - TINA-TI Reference Design
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Calculation tool

SBAR019 ADS127L11 Design Calculator

Supported products & hardware

Supported products & hardware

Products
Precision ADCs
ADS127L11 24-bit, 400-kSPS, delta-sigma ADC with easy-to-drive inputs and wideband or low-latency filters
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Reference designs

TIDA-010249 — Four-channel synchronous vibration sensor interface reference design

This reference design explains the theory, design and testing of a synchronous, four-channel wideband high-resolution interface. The main targets are the vibration sensing applications, but the design can also be applied to any application that requires wideband, such as three-phase voltage and (...)
Design guide: PDF
Package Pins Download
TSSOP (PW) 20 View options
WQFN (RUK) 20 View options

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